Therefore using 2 input NORs to make a 2 input AND you need three NORs. If you wanted something different (e.g. a 5 input AND) the above proof can be modified appropriately to get your answer.
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A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.
nor as well as nand gate are universal gates they both can be used as a complete set of logic gates
ans. 3 nand gates resoon :- OR GATE :- x+y NAND GATE :- x'+y' LOGIC :-so the logic is is we apply NAND to the inputs x' and y' instead of xand y we would get x+y DESIGN PROCEDURE 1. for inverting the input x and y can be done by NAND gates , 2. take a NAND gate and pass both x in both the inputs it means x NAND x gives you x' 3. follow similar procedure for inverting y 4. and then all the outputs of those NAND gates as the inputs of another NAND gate
A universal gate is a gate which can implement any Boolean function without need touse any other gate type.The NAND and NOR gates are universal gates.In practice, this is advantageous since NAND and NOR gates are economical andeasier to fabricate and are the basic gates used in all IC digital logic families.In fact, an AND gate is typically implemented as a NAND gate followed by aninverter not the other way around!!Likewise, an OR gate is typically implemented as a NOR gate followed by an inverternot the other way around!!A universal gate is a gate which can implement any Boolean function without need touse any other gate type.The NAND and NOR gates are universal gates.In practice, this is advantageous since NAND and NOR gates are economical andeasier to fabricate and are the basic gates used in all IC digital logic families.In fact, an AND gate is typically implemented as a NAND gate followed by aninverter not the other way around!!Likewise, an OR gate is typically implemented as a NOR gate followed by an inverternot the other way around!!can be combined to produce AND, OR,NOT,XORand XNOR gates
As such an OR gate should do the job...but if the question is of using gates other than the simple OR, it should be a combo of NOR and NOT gates; where-in, the NOT gate comes after the NOR gate. Factfully speaking: The output of a NOR gate when fed to a NOT gate shall give you an OR gate. cheers :) Anish Murthy Airpula, RF Design Engineer (F.A.E) Ceramic & Microwave Products Group, Dover Corporation Inc, United States of America
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A 2 input NAND gate requires 4 NOR gates.A 3 input NAND gate requires 5 NOR gates.A 4 input NAND gate requires 6 NOR gates.etc.
9,to implement a half adder 5 nand gates and for a full adder,another xor gate is required consisting of 4 nand gates. thus a total of 9 nand gates are required for a full adder.
two nand gates
by multiplying two NAND gates
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All other logic gates can be made using XOR and XNOR, but to get NOT, you need to do (input) XOR 1 or (input) XNOR 0, but with NAND, you don't need 1: (input) NAND (input).
A binary flip flop is a collection of 4 NAND gates arranged in specific circuit to allow it preserve state. The first two NAND gates use an external voltage as their first input and themselves as their second input; where as the second set of NAND gates use the first pair of gates output as their first input, and themselves as their second input.
for a two input gate to represent as an n-input gate excatly n-1 two input gates are required. this implies that for a two input OR gate to represent a four input OR gate exactly three two input OR gates are required let F is =a+b+c+d =(((a+b)+c)+d) =((a+b)+(c+d)) in both the above cases + is used three times so three two input OR gates make a four input OR gates. This discussion doesnot hold good for NAND gates an example can illlustrate the reson:- take F=(a.b.c.d)'=a'+b'+c'+d' --------------------------->(1) (this is obtained by a four input NAND gate) let us take this in the manner we did it for an OR gate and we will then verify the result. =((a.b)'(c.d)')' =((a'+b').(c'+d'))' =(a'+b')'+(c'+d')' =ab+cd <------------------------(2) (1)is not equal to (2) so we can say that a NAND gate cannot be replaced in the manner as OR gate is replaced
12 NOR gates are required to implement full adder
A&B = ((A&B)')' So two, it would go a - | ==NAND--=NAND-- b - | By using two NAND gates back-to-back, you can create a normal AND gate.
nor as well as nand gate are universal gates they both can be used as a complete set of logic gates